1. Field of the Invention
The present invention concerns a programmable ferroelectric polymer neural network.
2. Description of the Prior Art
The term "neural networks" in techniques relating to artificial intellegence, developed in the prior art, designates electrical circuits capable of performing conversions on vectors with a high number of components. Numerous exemplary embodiments of these circuits are known, for example, from the article, by J. J. Hopfield and D. W. Tank, "Neural Computation of Decisions in Optimization Problems" in Biological Cybernetics 52 141 152 (1985) and again from Hans P. Graf and Paul de Vegvar, "A CMOS Implementation of a Neural Network Model", AT & T Laboratories, Holmdel, N.J. 07733.
The object of these networks is to perform operations of the following type: EQU .vertline.Vs.vertline.=1..vertline.A.sub.ij .vertline..vertline.Ve.vertline.
where .vertline.Ve.vertline. is an input vector with N components V.sub.ei, such that EQU V.sub.ei .epsilon.{-1,+1},
.vertline.Vs.vertline. is an output vector with M components V.sub.sj such that EQU V.sub.sj .epsilon.-1, +1
and where .vertline.A.sub.ij .vertline. is a matrix of N.times.N positive or negative coefficients.
1. .vertline.A.sub.ij .vertline. designates the operation which, at an input vector Ve, causes an output vector V.sub.s to correspond in such a way that: ##EQU1##
With the convention that
sign (n)=1 si.times.&gt;O PA1 sign (n)=-1 si.times.&lt;O
The coefficients A.sub.ij are called "synaptic coefficients" or "synaptic weights".
According to known embodiments, the operation: ##EQU2## is achieved similarly by means of an amplifier circuit with a very high gain connected to a network of resistors. The resistors of the network are connected, by one of their ends, to the input of the amplifier circuit, each coefficient a.sub.ij being represented by the value of a resistor of the network. Thus, a neural network is obtained consisting of a neurone formed by the amplifier circuit and synapses, formed by the resistors. Again, according to this configuration, the sign of each synaptic coefficient a.sub.ij can be defined by biasing, though a voltage+u or -u, the end of the resistor corresponding to this coefficient which is not connected to the input of the amplifier circuit.
The matrix operator can be obtained by associating, in the same way, several amplifiers with their network of resistors. However, this association is not very viable industrially when the number of components of vectors processed is very high, for example when it is more than a thousand. In these conditions, it is clear that even in using techniques for making the most advanced very large scale integrated circuits, it is not possible to integrate, on one and the same substrate, 10.sup.6 resistors with different values associated with 1000 amplifiers.
It is also clear that a purely digital solution to this problem cannot be appropriate because an ideal processor should be capable of processing 10.sup.6 operations per elementary computation cycle and because no processor can presently achieve this.
There is also a known memorizing device with polarizable ferroelectric elements described in the European patent No. 016 6938. As shown in FIG. 7, this document describes, in particular, a system for writing and reading in a memory of this type consisting of a layer 1 of an electrically polarizable material flanked by a set 2, 3, of parallel conductive strips 2.sub.1, 2.sub.2 . . . ; 3.sub.1, 3.sub.2 , . . . , on its upper face and on its lower face. The two sets of conducting strips are set at 90.degree. with respect to each other so as to form several points of intersection, each defining a storage cell 4.
The writing operation on a cell 4 is done by setting up a voltage between the row 3.sub.3 conducting strip and the column 2.sub.4 conducting strip. The reading operation is done by piezoelectrical or pyroelectrical effect. In the latter case, it is proposed, in particular, to set up heating current pulses in each conducting strip 3.sub.1 and to collect the signals induced by the corresponding cells, in parallel on each of the perpendicular conducting strips 2.sub.1 , . . . 2.sub.4. All the cells can thus be explored by successive heating of each of the strips 3.sub.1 . . . 3.sub.4 under the control of a multiplexer 7.
This prior art device is far from being designed for or suited to the making of neural networks:
It cannot be used to introduce the values V.sub.ei of the components of the input vector Ve, nor to give the products a.sub.ij .multidot.V.sub.ei ;
it is not designed to perform adding operations used to obtain each of the components V.sub.sj of the resultant vector V.sub.s.